Minimization of Timed Transition Systems

15 For a formula = 93 c , the algorithm is the same; the initial partition now distinguishes between the cases ~ x0] = 0 and 0 < ~ x0] c and 0 < ~ x0] 6 6 c. The analysis for = 83 c is similar; the initial partition now needs to account for the progressiveness assumption also (as in the case of 83). Automatic veriication of nite-state concurrent systems using temporal-logic speciications. 14 certain sets of regions. In particular, these constraints require that for every clock i, the constraint ~ xi] = 0 or ~ xi] > c i holds at innnitely many regions along the path (here, c i is the largest constant in a constraint involving x in the enabling conditions of G). We can use this fact to handle progressiveness in our reduced region graphs.

[1]  Edmund M. Clarke,et al.  Automatic Verification of Sequential Circuits Using Temporal Logic , 1986, IEEE Transactions on Computers.

[2]  Thomas A. Henzinger,et al.  A really temporal logic , 1994, JACM.

[3]  David L. Dill,et al.  Timing Assumptions and Verification of Finite-State Concurrent Systems , 1989, Automatic Verification Methods for Finite State Systems.

[4]  A. Prasad Sistla,et al.  Quantitative Temporal Reasoning , 1990, CAV.

[5]  Thomas A. Henzinger,et al.  The benefits of relaxing punctuality , 1991, JACM.

[6]  Thomas A. Henzinger,et al.  Symbolic model checking for real-time systems , 1992, [1992] Proceedings of the Seventh Annual IEEE Symposium on Logic in Computer Science.

[7]  Rajeev Alur,et al.  Model-checking for real-time systems , 1990, [1990] Proceedings. Fifth Annual IEEE Symposium on Logic in Computer Science.

[8]  E. Emerson,et al.  Modalities for model checking (extended abstract): branching time strikes back , 1985, ACM-SIGACT Symposium on Principles of Programming Languages.

[9]  Mihalis Yannakakis,et al.  Minimum and maximum delay problems in real-time systems , 1991, Formal Methods Syst. Des..

[10]  Chin-Laung Lei,et al.  Modalities for Model Checking: Branching Time Logic Strikes Back , 1987, Sci. Comput. Program..

[11]  Nicolas Halbwachs,et al.  Minimal Model Generation , 1990, CAV.

[12]  Joseph Sifakis,et al.  From ATP to Timed Graphs and Hybrid Systems , 1991, REX Workshop.

[13]  Edmund M. Clarke,et al.  Using Branching Time Temporal Logic to Synthesize Synchronization Skeletons , 1982, Sci. Comput. Program..

[14]  Grzegorz Rozenberg,et al.  Real-Time: Theory in Practice: Rex Workshop, Mook, the Netherlands, June 3-7, 1991: Proceedings , 1992 .

[15]  Karlis Cerans,et al.  Decidability of Bisimulation Equivalences for Parallel Timer Processes , 1992, CAV.

[16]  H. Wong-Toi,et al.  The control of dense real-time discrete event systems , 1991, [1991] Proceedings of the 30th IEEE Conference on Decision and Control.

[17]  Edmund M. Clarke,et al.  Symbolic Model Checking: 10^20 States and Beyond , 1990, Inf. Comput..

[18]  David Lee,et al.  Online minimization of transition systems (extended abstract) , 1992, STOC '92.

[19]  Thomas A. Henzinger,et al.  Symbolic Model Checking for Real-Time Systems , 1994, Inf. Comput..

[20]  Nicolas Halbwachs,et al.  Minimal State Graph Generation , 1992, Sci. Comput. Program..