Exploiting Parallelism and Heterogeneity in a Radiation Effects Test Vehicle for Efficient Single-Event Characterization of Nanoscale Circuits
暂无分享,去创建一个
J. S. Kauppila | D. R. Ball | J. A. Maharrey | R. C. Harrington | T. D. Haeffner | A. L. Sternberg | L. W. Massengill | B. L. Bhuva | P. Nsengiyumva | E. X. Zhang
[1] M. Gaillardin,et al. New Insights Into Single Event Transient Propagation in Chains of Inverters—Evidence for Propagation-Induced Pulse Broadening , 2007, IEEE Transactions on Nuclear Science.
[2] J. S. Kauppila,et al. Dual-Interlocked Logic for Single-Event Transient Mitigation , 2018, IEEE Transactions on Nuclear Science.
[3] J. S. Kauppila,et al. The Impact of Charge Collection Volume and Parasitic Capacitance on SEUs in SOI- and Bulk-FinFET D Flip-Flops , 2018, IEEE Transactions on Nuclear Science.
[4] W. Timothy Holman,et al. Angular Effects on Single-Event Mechanisms in Bulk FinFET Technologies , 2018, IEEE Transactions on Nuclear Science.
[5] W. Timothy Holman,et al. Heavy-Ion Induced SETs in 32nm SOI Inverter Chains , 2015, 2015 IEEE Radiation Effects Data Workshop (REDW).
[6] Masanori Hashimoto,et al. Measurement circuits for acquiring SET pulsewidth distribution with sub-FO1-inverter-delay resolution , 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).
[7] Adrian Evans,et al. New Techniques for SET Sensitivity and Propagation Measurement in Flash-Based FPGAs , 2014, IEEE Transactions on Nuclear Science.
[8] Kaushik Roy,et al. Robust Level Converter for Sub-Threshold/Super-Threshold Operation:100 mV to 2.5 V , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[9] J. S. Kauppila,et al. Impact of Single-Event Transient Duration and Electrical Delay at Reduced Supply Voltages on SET Mitigation Techniques , 2018, IEEE Transactions on Nuclear Science.
[10] L. W. Massengill,et al. Single Event Transients in Digital CMOS—A Review , 2013, IEEE Transactions on Nuclear Science.
[11] Adrian Evans,et al. Detailed SET Measurement and Characterization of a 65 nm Bulk Technology , 2017, IEEE Transactions on Nuclear Science.
[12] T. Onoye,et al. SET pulse-width measurement eliminating pulse-width modulation and within-die process variation effects , 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).
[13] J. S. Kauppila,et al. Heavy Ion SEU Test Data for 32nm SOI Flip-Flops , 2015, 2015 IEEE Radiation Effects Data Workshop (REDW).
[14] Nobutaka Kuroki,et al. A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs , 2012, IEEE Journal of Solid-State Circuits.
[15] Masanori Hashimoto,et al. Impact of NBTI-Induced Pulse-Width Modulation on SET Pulse-Width Measurement , 2013, IEEE Transactions on Nuclear Science.
[16] J. S. Kauppila,et al. On-Chip Measurement of Single-Event Transients in a 45 nm Silicon-on-Insulator Technology , 2012, IEEE Transactions on Nuclear Science.
[17] B. Narasimham,et al. On-Chip Characterization of Single-Event Transient Pulsewidths , 2006, IEEE Transactions on Device and Materials Reliability.
[18] J. Melinger,et al. Investigation of the Propagation Induced Pulse Broadening (PIPB) Effect on Single Event Transients in SOI and Bulk Inverter Chains , 2008, IEEE Transactions on Nuclear Science.
[19] T. D. Loveless,et al. Effect of Device Variants in 32 nm and 45 nm SOI on SET Pulse Distributions , 2013, IEEE Transactions on Nuclear Science.