A fast modular simulator for combinational logic circuits generated by genetic algorithm

This paper presents a structure for a fast generic simulator for combinational logic circuits, intended for use with genetic algorithm (GA) multi-objective optimization. A modular structure is proposed containing a chromosome translator layer, so to isolate the simulator from the idiosyncrasies of the chosen genetic codification. The simulator archieved high performance, considering its software-only implementation, and it was successfully used to generate valid circuits while integrated into a GA.

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