Highly linear and low noise 2.4 GHz RF front-end circuits using transformer and vertical NPN BJT

The proposed RF front-end circuits consist of a low noise amplifier using an on-chip transformer and a downconversion mixer using a parasitic vertical bipolar junction transistor and have been implemented in 0.18 mum deep n-well CMOS process. A gain of 33 dB, an IIP3 of -12 dBm, and a DSB noise figure of 4.5 dB have been achieved while consuming 5 mW from a 1.8 V supply

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