Defect detection using power supply transient signal analysis

Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. The power supply transient signals of an 8-bit multiplier are analyzed using both hardware and simulation experiments. The small signal variations generated at these test points are analyzed in both the time and frequency domain. A simple statistical procedure is presented that captures the variation introduced by defects while attenuating those variations introduced by process variations. The results of the analysis show that it is possible to distinguish between defect-free and defective devices in both simulation and hardware.

[1]  Bapiraju Vinnakota,et al.  Monitoring Power Dissipation for Fault Detection , 1996, Proceedings of 14th VLSI Test Symposium.

[2]  Peter Janssen,et al.  Defect detection with transient current testing and its potential for deep sub-micron CMOS ICs , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[3]  James F. Plusquellic,et al.  Identification of defective CMOS devices using correlation and regression analysis of frequency domain transient signal data , 1997, Proceedings International Test Conference 1997.

[4]  Wojciech Maly,et al.  CMOS bridging fault detection , 1990, Proceedings. International Test Conference 1990.

[5]  Jaime Ramírez-Angulo,et al.  I/sub DD/ pulse response testing on analog and digital CMOS circuits , 1993, Proceedings of IEEE International Test Conference - (ITC).

[6]  James F. Plusquellic,et al.  Characterization of CMOS defects using transient signal analysis , 1998, Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223).

[7]  J. M. Soden,et al.  Electrical properties and detection methods for CMOS IC defects , 1989, [1989] Proceedings of the 1st European Test Conference.

[8]  A. P. Dorey.  Rapid Reliability Assessment of VLSICs , 1990 .

[9]  Bapiraju Vinnakota.  Monitoring power dissipation for fault detection , 1996, Proceedings of 14th VLSI Test Symposium.

[10]  Claude Thibeault.  Detection and location of faults and defects using digital signal processing , 1995, Proceedings 13th IEEE VLSI Test Symposium.

[11]  James F. Plusquellic,et al.  Digital integrated circuit testing using transient signal analysis , 1996, Proceedings International Test Conference 1996. Test and Design Validity.

[12]  A.D. Singh,et al.  IDDQ testing of CMOS opens: an experimental study , 1995, Proceedings of 1995 IEEE International Test Conference (ITC).

[13]  Bapiraju Vinnakota,et al.  Process-tolerant test with energy consumption ratio , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[14]  Shyang-Tai Su,et al.  Transient power supply current testing of digital CMOS circuits , 1995, Proceedings of 1995 IEEE International Test Conference (ITC).

[15]  Abhijit Chatterjee,et al.  Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages , 1996, Proceedings of 14th VLSI Test Symposium.