Low temperature CMOS compatible Cu-Cu thermo-compression bonding with constantan alloy passivation for 3D IC integration

In this paper, we report low temperature wafer level Cu-Cu thermo-compression bonding using an ultra-thin Copper — Nickel based alloy layer, constantan as passivation layer. Major bottlenecks in achieving low temperature and low pressure bonding are surface oxidation and roughness. Constantan alloy on Cu surface has a dual role of preventing Cu surface from oxidation and reduces the surface roughness. Passivation reduces the bonding temperature as it prevents copper surface from oxidation. In this endeavor, constantan alloy passivation thickness was optimized by varying thickness of constantan layer on Cu surface and studied the effect of surface roughness by performing AFM analysis. Simultaneously surface passivation was studied using Secondary Ion Mass Spectroscopy (SIMS) depth profiling. The optimum constantan passivation thickness is found to be 2 nm for achieving wafer level Cu-Cu bonding at temperature as low as 150 ˚C at constant contact force of 4.5 kN (5 bar). Our optimized result yielded a very good bond strength of 152 MPa which compared well with the available literatures.

[1]  Chuan Seng Tan,et al.  Cu-Cu diffusion bonding enhancement at low temperature by surface passivation using self-assembled monolayer of alkane-thiol , 2009 .

[2]  Siva Rama Krishna Vanjari,et al.  Ultra-thin Ti passivation mediated breakthrough in high quality Cu-Cu bonding at low temperature and pressure , 2016 .

[3]  Siva Rama Krishna Vanjari,et al.  High Quality Fine-Pitch Cu-Cu Wafer-on-Wafer Bonding with Optimized Ti Passivation at 160°C , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[4]  Tadatomo Suga,et al.  Room temperature Cu–Cu direct bonding using surface activated bonding method , 2003 .

[5]  Ching-Te Chuang,et al.  Novel Cu-to-Cu Bonding With Ti Passivation at 180 $^{\circ}{\rm C}$ in 3-D Integration , 2013, IEEE Electron Device Letters.

[6]  Neal R Armstrong,et al.  Oxides formed on polycrystalline titanium thin-film surfaces: rates of formation and composition of oxides formed at low and high O2 partial pressures , 1986 .

[7]  A. Fan,et al.  Copper Wafer Bonding , 1999 .

[8]  R. Gutmann,et al.  Wafer Level 3-D ICs Process Technology , 2008 .

[9]  Yuan Xie Processor Architecture Design Using 3D Integration Technology , 2010, 2010 23rd International Conference on VLSI Design.

[10]  Tamal Ghosh,et al.  Long term efficacy of ultra-thin Ti passivation layer for achieving low temperature, low pressure Cu-Cu Wafer-on-Wafer bonding , 2015, 2015 International 3D Systems Integration Conference (3DIC).

[11]  Ronald J. Gutmann,et al.  Overview of Wafer-Level 3D ICs , 2008 .

[12]  Ching-Te Chuang,et al.  Novel Cu-to-Cu Bonding With Ti Passivation at 180 °C in 3-D Integration , 2013 .

[13]  Peter Ramm,et al.  Handbook of 3D integration : technology and applications of 3D integrated circuits , 2012 .

[14]  Asudeb Dutta,et al.  Facile non thermal plasma based desorption of self assembled monolayers for achieving low temperature and low pressure Cu–Cu thermo-compression bonding , 2015 .

[15]  Chuan Seng Tan,et al.  (Invited) Cu Surface Passivation with Self-Assembled Monolayer (SAM) and Its Application for Wafer Bonding at Moderately Low Temperature , 2013 .

[16]  Günter Reiss,et al.  Oxidation behaviour of Cu−Ni(Mn) (constantan) films , 1995 .

[17]  Chuan Seng Tan,et al.  Silicon Multilayer Stacking Based on Copper Wafer Bonding , 2005 .