Bit refresh circuit for refreshing fault register bit values, integrated circuit apparatus having the same, and register-bit value refresh method
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Register bit refresh circuit for recognition by refreshing the bit error value, the integrated circuit device and a method having the same are disclosed. In the integrated circuit device, and a bit value of the register that stores data for controlling the operation of the logic circuit Li bladder relax unit for checking whether varied by external noise. The ridge portion bladder relax if you have to check if there is an error of the register bit value due to noise by bit error, thereby refreshing the data of the corresponding bits stored in the memory to the register.