A UML 2.0 profile for SystemC: toward high-level SoC design

In this paper we present a UML 2.0 profile for the SystemC language, which is a consistent set of modeling constructs designed to lift both structural and behavioral features (including events and time features) of the SystemC language to UML level. The main target of this profile is to provide a means for software and hardware engineers to improve the current industrial Systems-on-a-Chip (SoC) design methodology joining the capabilities of UML and SystemC to operate at system-level.

[1]  Luciano Lavagno,et al.  Embedded UML: a merger of real-time UML and co-design , 2001, Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571).

[2]  Elvinia Riccobene,et al.  A SoC design methodology involving a UML 2.0 profile for SystemC , 2005, Design, Automation and Test in Europe.

[3]  Thorsten Grotker,et al.  System Design with SystemC , 2002 .

[4]  Peter Fettke,et al.  Model Driven Architecture (MDA) , 2003, Wirtsch..

[5]  P. S. Thiagarajan,et al.  Model-driven SoC design via executable UML to SystemC , 2004, 25th IEEE International Real-Time Systems Symposium.

[6]  Tsuneo Nakata,et al.  System-on-chip validation using UML and CWL , 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

[7]  Elvinia Riccobene,et al.  A UML 2.0 profile for SystemC , 2005 .

[8]  Sofiène Tahar,et al.  A survey on system-on-a-chip design languages , 2003, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings..

[9]  Elvinia Riccobene,et al.  Modelling SystemC Process Behavior by the UML Method State Machines , 2004, RISE.

[10]  Rocco Moretti,et al.  Model Driven Architecture (MDA) , 2007 .

[11]  Axel Uhl,et al.  Model-Driven Architecture , 2002, OOIS Workshops.