MIMO equalization optimized for baud rate clock recovery in coherent 112 Gbit/sec DP-QPSK metro systems

Abstract A novel MIMO equalization architecture optimized for baud rate clock recovery (BCR-MIMO) in coherent 112 Gbit/sec dual polarization quadrature phase shift keying (DP-QPSK) metro systems is proposed. This architecture is designed to decouple between multiple-input-multiple-output (MIMO) equalization and clock recovery (CR) loops, avoiding the interaction between them. The decoupling between the two loops is achieved, while maintaining similar MIMO equalizer performance, as compared to the butterfly-structured equalizer.

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