Optical interconnects for neural and reconfigurable VLSI architectures

The increasing transistor density in very large-scale integrated (VLSI) circuits and the limited pin member in the off-chip communication lead to a situation described as interconnect crisis in micro-electronics. Optoelectronic VLSI (OE-VLSI) circuits using short-distance optical interconnects and optoelectronic devices like microlaser, modulator, and detector arrays for optical off-chip sending and receiving offer a technology to overcome this crisis. However, in order to exploit efficiently the potential of thousands of optical off-chip interconnects, an appropriate VLSI architecture is required. We show for the example of neural and reconfigurable VLSI architectures that fine-grain architectures fulfill these requirements. An OE-VLSI circuit realization based on multiple quantum-well modulators functioning as two-dimensional (2-D) optical input/output (I/O) interface for the chip is presented. Due to the parallel optical interface, and improvement of two to three orders of magnitude in the throughput performance is possible compared to all-electronic solutions. For the optical interconnects, a planar-integrated free-space optical system has been designed leading to an optical multichip module. Such a system has been fabricated and experimentally characterized. Furthermore, we designed an manufactured fiber arrays, which will be the core element for a convenient test station for the 2-D optoelectronic I/O interface of OE-VLSI circuits.

[1]  T. Yamamoto,et al.  Fabrication of two-dimensional fiber arrays using microferrules , 1998 .

[2]  Paul Cook,et al.  Labor market adjustment in small open economies: The case of Micronesia , 1998 .

[3]  Yue Liu,et al.  Smart-pixel array technology for free-space optical interconnects , 2000, Proceedings of the IEEE.

[4]  Joni Dambre,et al.  Optoelectronic FPGAs , 1999 .

[5]  M Gruber,et al.  Planar-integrated optical vector-matrix multiplier. , 2000, Applied optics.

[6]  Ray T. Chen,et al.  Fully embedded board-level guided-wave optoelectronic interconnects , 2000, Proceedings of the IEEE.

[7]  Michael R. Feldman Holographic optical interconnects for multichip modules , 1991 .

[8]  Henk Neefs,et al.  Latency requirements of optical interconnects at different memory hierarchy levels of a computer system , 1998, Other Conferences.

[9]  D Fey,et al.  Specification for a reconfigurable optoelectronic VLSI processor suitable for digital signal processing. , 1998, Applied optics.

[10]  Milan Vasilko,et al.  Optically Reconfigurable FPGAs: Is this a Future Trend? , 1996, FPL.

[11]  Dietmar Fey,et al.  Transformation of a 2-D VLSI Systolic Adder Circuit in 3-D Circuits Using Optical Interconnections , 1996, Euro-Par, Vol. II.

[12]  Jürgen Jahns,et al.  VI: Free-Space Optical Digital Computing and Interconnection , 1998 .

[13]  J Jahns,et al.  Integrated micro-optical imaging system with a high interconnection capacity fabricated in planar optics. , 1997, Applied optics.

[14]  Andreas Neyer,et al.  2D optical array interconnects using plastic optical fibres , 1997 .

[15]  Karl-Heinz Brenner,et al.  Optical motherboard: a planar chip-to-chip interconnection scheme for dense optical wiring , 1998, Other Conferences.

[16]  D. Kossives,et al.  3-D integration of MQW modulators over active submicron CMOS circuits: 375 Mb/s transimpedance receiver-transmitter circuit , 1995, IEEE Photonics Technology Letters.

[17]  A A Sawchuk,et al.  Demonstration and architectural analysis of complementary metal-oxide semiconductor /multiple-quantum-well smart-pixel array cellular logic processors for single-instruction multiple-data parallel-pipeline processing. , 1999, Applied optics.

[18]  Jürgen Jahns,et al.  Planar packaging of free-space optical interconnections , 1994, Proc. IEEE.

[19]  M. Naruse,et al.  Reconfigurable optical interconnections for parallel computing , 2000, Proceedings of the IEEE.

[20]  F.J. Leonberger,et al.  Optical interconnections for VLSI systems , 1984, Proceedings of the IEEE.

[21]  Günther Palm,et al.  On Associative Memories , 1987 .

[22]  Masatoshi Ishikawa,et al.  Optically Interconnected Parallel Computing Systems , 1998, Computer.

[23]  W. S. Hobson,et al.  Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits , 1999, IEEE Photonics Technology Letters.

[24]  Norbert Streibl,et al.  Beam Shaping with Optical Array Generators , 1989 .

[25]  A Au,et al.  Field-programmable smart-pixel arrays: design, VLSI implementation, and applications. , 1999, Applied optics.

[26]  Adolf W. Lohmann Image formation of dilute arrays for optical information processing , 1991 .

[27]  Roger Vounckx,et al.  Spatially modulated light detector in CMOS with sense-amplifier receiver operating at 180 Mb/s for optical data link applications and parallel optical interconnects between chips , 1998 .

[28]  J R Fienup,et al.  Phase retrieval algorithms: a comparison. , 1982, Applied optics.

[29]  Günther Palm The PAN System and the WINA Project , 1993 .

[30]  Ashok V. Krishnamoorthy,et al.  500-Mb/s 32-channel CMOS VCSEL driver with built-in self-test and clock generation circuitry , 1999, Photonics West.

[31]  H Toyoda,et al.  Learning and recall algorithm for optical associative memory using a bistable spatial light modulator. , 1995, Applied optics.