Dynamic voltage scaling and power management for portable systems

Portable systems require long battery lifetime while still delivering high performance. Dynamic voltage scaling (DVS) algorithms reduce energy consumption by changing processor speed and voltage at run time depending on the needs of the applications running. Dynamic power management (DPM) policies trade off the performance for the power consumption by selectively placing components into low-power states. In this work we extend the DPM model with a DVS algorithm, thus enabling larger power savings. We test our approach on MPEG video and MP3 audio algorithms running on the SmartBadge portable device. Our results show savings of a factor of three in energy consumption for combined DVS and DPM approaches.

[1]  Seongsoo Lee,et al.  Run-time voltage hopping for low-power real-time systems , 2000, DAC.

[2]  Rein Vesilo.  Cumulative sum technique in ATM traffic management , 1998, IEEE GLOBECOM 1998 (Cat. NO. 98CH36250).

[3]  Miodrag Potkonjak,et al.  Power optimization of variable-voltage core-based systems , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Larry L. Peterson,et al.  Predicting MPEG execution times , 1998, SIGMETRICS '98/PERFORMANCE '98.

[5]  Kiyoung Choi,et al.  Power conscious fixed priority scheduling for hard real-time systems , 1999, DAC '99.

[6]  L. Geppert,et al.  Transmeta's magic show [microprocessor chips] , 2000 .

[7]  Anantha Chandrakasan,et al.  Data driven signal processing: an approach for energy efficient computing , 1996, ISLPED '96.

[8]  Thomas D. Burd,et al.  Voltage scheduling in the IpARM microprocessor system , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[9]  Luca Benini,et al.  Dynamic power management for portable systems , 2000, MobiCom '00.

[10]  Hal Wasserman,et al.  Comparing algorithm for dynamic speed-setting of a low-power CPU , 1995, MobiCom '95.

[11]  M. Potkonjak,et al.  On-line scheduling of hard real-time tasks on variable voltage processor , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[12]  Miodrag Potkonjak,et al.  Power optimization of variable voltage core-based systems , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[13]  Giovanni De Micheli,et al.  Energy efficient design of portable wireless systems , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[14]  Scott Shenker,et al.  Scheduling for reduced CPU energy , 1994, OSDI '94.

[15]  Hiroto Yasuura,et al.  Voltage scheduling problem for dynamically variable voltage processors , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[16]  Thomas D. Burd,et al.  The simulation and evaluation of dynamic voltage scaling algorithms , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[17]  F. Frances Yao,et al.  A scheduling model for reduced CPU energy , 1995, Proceedings of IEEE 36th Annual Foundations of Computer Science.