A low-power analog logarithmic map circuit with offset and temperature compensation for use in bionic ears

Logarithmic map circuits are useful in many applications that require non-linear signal compression, such as in speech recognition and cochlear implants. A logarithmic current-mode A/D converter with temperature compensation and automatic offset calibration is presented in this paper. It employs a dual-slope, auto-zeroing topology with a 60 dB dynamic range and 300 Hz sampling rate, for capturing the envelope of speech signals in a bionic ear. Fabricated in a 1.5 μm process, the circuit consumes only 1 μW of analog power and another 1 μW of digital power, and can therefore run for over 50 years on just a couple of AA batteries. At the current level of power consumption, we have proven that this design is thermal-noise limited to a 6-bit precision, and higher precision is possible only if we expend more power. As such, it is already useful for cochlear implants, as deaf patients can only discriminate 1 dB out of a 30 dB dynamic range in the auditory nerve bundles. For the purpose of using this circuit in other applications, we conclude with several strategies that can increase the precision without hurting the power consumption. Thesis supervisor: Rahul Sarpeshkar Title: Assistant Professor of Electrical Engineering