ANovelP-Poly GatePNOSDevice Featuring High2nd_Bit Operation WindowforMulti-bit/cell Flash MemoryApplications

Fig. 2showstheerase characteristics withdifferent positive gate voltages. Higher +Vgcanenhance erase efficiency andtheerased Vt A novelPNOS(P-poly Nitride-Oxide-Si) device thatexploitsshfof4 cabedmnttdin0QsInFg3,hehre gateedgeassisted holeinjection isproposed toreduce the2nd -bit pmingcun (c istused to 0ontorthe h c e ran effect. Thedevice iserased bygate holeinjection andprogrammed by SiN.Thegshift oIcp reprsents anincrine holec hare theusual CHE (channel hotelectron). Holesareinjected fromthe Sity aft ea operatin. Th increase Iccurren is cause gateedgeusing +FN andtrapped intheSiNthatproduce local parsitic lerae opefetion Thevinrtalr dacrray. Fi4ashw th negaive talng te canne edg.Ths ede dviceintm cases parasitic leakage effect inthevirtual ground array. Fig. 4showsthe negative Vtalong thechannel edge. Thisedgedevice inturncauses A ~~~~~I-V characteristics atdifferent erased Vt levels. Thedegraded enhanced DIBLthat helps toprovide alarge 2nd-bit window(>4.5V) VchrteiisatdfrntrsdVtlvs.Teegdd enhacedDIBLtha helst proidealagend~bt wndow(>45V) subthreshold swingreflects thenon-uniform holedistribution. The that issuitable forMLC operation. Using this device, 4-bit/cell and lcytrapped holechr tponygtiegnn turn d onaThe 6-bit/cell oprtosaeilsrtd locally trapped holecharge atpoly gateedge inturndominates the 6-bit/cell operations areillustrated. deviceperformance andproduces worse gate control ability and