Embedded implementation of modular closed-loop control of diabetes and in silico validation

Modular closed-loop control has been demonstrated to be a very promising way to treat diabetes disease: PC-based systems running this type of algorithm have been successfully tested in clinical trials [1]. In order to allow the introduction of this kind of approach for the control of diabetes in the so called “Artificial Pancreas” wearable devices, an embedded implementation of the algorithm must respect specific and strict constraints in terms of computational power and memory footprint. In this paper we introduce the architecture of an embedded solution for closed-loop control of diabetes. In addition, we provide details about the implementation, memory requirements and needed computational power. We also validate the embedded algorithm via in silico pre-clinical trials demonstrating the feasibility of using modular closed-loop control of diabetes in a wearable system.

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