3.6 GHz highly monotonic digitally controlled oscillator for all-digital phase locked loop
暂无分享,去创建一个
Keiji Yoshida | Ramesh K. Pokharel | Haruichi Kanaya | Abhishek Tomar | R. Pokharel | K. Yoshida | H. Kanaya | A. Tomar
[1] Luca Fanori,et al. 3.3GHz DCO with a frequency resolution of 150Hz for All-digital PLL , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[3] A. Hajimiri,et al. The Design of Low Noise Oscillators , 1999 .
[4] Student,et al. THE PROBABLE ERROR OF A MEAN , 1908 .
[5] Saska Lindfors,et al. A digitally controlled 2.4-GHz oscillator in 65-nm CMOS , 2007, Norchip 2007.
[6] Ramesh Harjani,et al. Design of High-Performance CMOS Voltage-Controlled Oscillators , 2002 .
[7] L. Maurer,et al. A UMTS-complaint fully digitally controlled oscillator with 100Mhz fine-tuning range in 0.13/spl mu/m CMOS , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
[8] Poras T. Balsara,et al. A first multigigahertz digitally controlled oscillator for wireless applications , 2003 .