Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40nm CMOS

the integration of Global Navigation Satellite Systems (GNSS) receiver with other wireless functionalities, e.g., GSM, WCDMA, LTE, Bluetooth, and WiFi, brings up new design challenges due to constrained silicon area and power consumption, and especially the interferences from other wireless functionalities. A dual-channel multi-mode GNSS RF receiver, for reception of GPS-L1, GLONASS-B1, Compass-B1, and Galileo-E1, is proposed to address these challenges. A novel frequency plan and a reconfigurable complex band-pass filter enable the two multi-mode reception channels to share most circuit blocks and thus reduce the power consumption and silicon area. An N-path filter and adaptive gain control is implemented in the RF front-end to reject the out-of-band interferences for high linearity. Designed in a 40nm CMOS, the proposed multi-mode GNSS RF receiver, including the RF front-end, baseband filter and ADC, PLL, and VCO, achieves a total noise figure of 1.7dB, out-of-band (1710MHz) input 1dB compression point of −16.5dBm, while consuming a total power of 13.2mW.

[1]  Ahmad Mirzaei,et al.  A 65 nm CMOS Quad-Band SAW-Less Receiver SoC for GSM/GPRS/EDGE , 2011, IEEE Journal of Solid-State Circuits.

[2]  Jaeheon Lee,et al.  A 26mW dual-mode RF receiver for GPS/Galileo with L1/L1F and L5/E5a bands , 2008, 2008 International SoC Design Conference.

[3]  Kwyro Lee,et al.  A 19-mW 2.6-mm2 L1/L2 dual-band CMOS GPS receiver , 2005, IEEE J. Solid State Circuits.

[4]  Ahmad Mirzaei,et al.  Analysis and Optimization of Direct-Conversion Receivers With 25% Duty-Cycle Current-Driven Passive Mixers , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  H. Darabi,et al.  A 65nm CMOS quad-band SAW-less receiver for GSM/GPRS/EDGE , 2010, 2010 Symposium on VLSI Circuits.

[6]  I. W. Sandberg,et al.  An alternative approach to the realization of network transfer functions: The N-path filter , 1960 .

[7]  Kwyro Lee,et al.  A 19-mW 2.6-mm2 L1/L2 dual-band CMOS GPS receiver , 2005 .

[8]  Byeong-Ha Park,et al.  A 23mW fully integrated GPS receiver with robust interferer rejection in 65nm CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[9]  Jun-Gi Jo,et al.  A L1-band dual-mode RF receiver for GPS and Galileo in 0.18μm CMOS , 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

[10]  Jun-Gi Jo,et al.  An $L1$ -Band Dual-Mode RF Receiver for GPS and Galileo in 0.18- $\mu {\hbox{m}}$ CMOS , 2009 .

[11]  Chao Lu,et al.  Reconfigurable dual-channel tri-mode all-band RF receiver for next generation GNSS , 2010, 2010 IEEE Asian Solid-State Circuits Conference.