A design approach for GALS based systems-on-chip

In this paper, we present an efficient design flow for GALS systems based on the state-of-art commercial tools, we first designed an asynchronous wrapper equipped with handshake circuits and stoppable clock generator, and then selected a digital FIR filter as a design example. The simulation and verification show our proposed interface circuits is of good performance in terms of speed and area. The design efficiency is also improved by allowing standard tools to better support GALS based designs.

[1]  Ad M. G. Peeters,et al.  Single-rail handshake circuits , 1995, Proceedings Second Working Conference on Asynchronous Design Methodologies.

[2]  Wolfgang Fichtner,et al.  Practical design of globally-asynchronous locally-synchronous systems , 2000, Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586).

[3]  Peter Y. K. Cheung,et al.  Asynchronous wrapper for heterogeneous systems , 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

[4]  Ken Mai,et al.  The future of wires , 2001, Proc. IEEE.

[5]  Kenneth Y. Yun,et al.  Pausible clocking: a first step toward heterogeneous systems , 1996, Proceedings International Conference on Computer Design. VLSI in Computers and Processors.

[6]  Lars Wanhammar,et al.  Asynchronous data communication with low power for GALS systems , 2002, 9th International Conference on Electronics, Circuits and Systems.

[7]  Hui Zhang,et al.  Low-swing interconnect interface circuits , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[8]  L. Lundheim,et al.  A socket interface for GALS using locally dynamic voltage scaling for rate-adaptive energy saving , 2001, Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558).