Use of structural tests in RTL verification
暂无分享,去创建一个
[1] Chantal Robach,et al. From specification validation to hardware testing: a unified method , 1996, Proceedings International Test Conference 1996. Test and Design Validity.
[2] Jian Kang,et al. Efficient RTL Coverage Metric for Functional Test Selection , 2007, 25th IEEE VLSI Test Symposium (VTS'07).
[3] Xiao Sun,et al. Functional verification coverage vs. physical stuck-at fault coverage , 1998, Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223).
[4] Testability Analysis. An Approach to Functional Level , 1989 .
[5] William K. Lam. Hardware Design Verification: Simulation and Formal Method-Based Approaches (Prentice Hall Modern Semiconductor Design Series) , 2005 .
[6] Srinivas Patil,et al. Scan-based transition test , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[7] Vishwani D. Agrawal,et al. Validation vector grade (VVG): a new coverage metric for validation and test , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).
[8] F. Joel Ferguson,et al. Testing finite state machines based on a structural coverage metric , 2002, Proceedings. International Test Conference.
[9] Premachandran R. Menon,et al. An approach to functional level testability analysis , 1989, Proceedings. 'Meeting the Tests of Time'., International Test Conference.