Integrator swing reduction in feedback compensated Sigma-Delta modulators

This paper describes a method to improve the linearity, area or SNR of feedback (FB) compensated Sigma-Delta (ΣΔ) modulators. These performance limiting factors are often related to the outer loop feedback DAC or to the 1st integrator of the ΣΔ-modulator in a FB-compensated modulator. This work focuses on improvements of the 1st integrator. The origin of these problems is the output swing of the 1st integrator, which includes and is dominated by the input signal. This problem is usually solved by increasing the capacitor size of this integrator, which results in an increased area and power. Another common solution is to use a feed-forward (FF) compensated ΣΔ-modulator, where basically only quantization noise is processed by the 1st integrator. However the drawback of this approach is a usually wide bandwidth and peaking of the modulator's signal transfer function (STF). The proposed solution greatly reduces signal swing at the 1st integrator, by not affecting the STF. Thus, it takes the advantages of the FF-topology, by keeping the advantages of the FB-topology.

[1]  Pieter Rombouts,et al.  Controlled behaviour of STF in CT ΣΔ modulators , 2005 .

[2]  O. Oliaei,et al.  Sigma-delta modulator with spectrally shaped feedback , 2003, IEEE Trans. Circuits Syst. II Express Briefs.

[3]  A.H.M. van Roermund,et al.  A continuous-time /spl Sigma//spl Delta/ ADC with increased immunity to interferers , 2004, IEEE Journal of Solid-State Circuits.

[4]  Mohammad Ranjbar,et al.  A robust STF 6mW CT ΔΣ modulator with 76dB dynamic range and 5MHz bandwidth , 2010, IEEE Custom Integrated Circuits Conference 2010.

[5]  A. Torralba,et al.  A 4.7mW 89.5dB DR CT complex /spl Delta//spl Sigma/ ADC with built-in LPF , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[6]  E. Riccio,et al.  A 3mW continuous-time /spl Sigma//spl Delta/-modulator for EDGE/GSM with high adjacent channel tolerance , 2004, Proceedings of the 30th European Solid-State Circuits Conference.

[7]  Pieter Rombouts,et al.  STF Behaviour in a CT $Sigma Delta$ Modulator , 2005 .

[8]  Bernard Mulgrew,et al.  On the design of high-performance wide-band continuous-time sigma-delta converters using numerical optimization , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.