Air-interfacing microwave passive RFID tag in bulk CMOS

Overcoming the price hurdle that hampers mass-scale RFID adoption, this paper examines the architectural trade-offs as well as design issues involved in the development of a passive RFID tag IC targeted for low cost high volume deployment. Peculiar air-interfacing problems related to power rectification, data demodulation and backscattering modulation are addressed through the discussion of a design example whereby a 2.45-GHz RFID tag IC has been implemented in standard CMOS process.

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