Test-mode-only scan attack using the boundary scan chain
暂无分享,去创建一个
[1] Ramesh Karri,et al. Secure Scan: A Design-for-Test Architecture for Crypto Chips , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[2] Giorgio Di Natale,et al. Scan Attacks and Countermeasures in Presence of Scan Response Compactors , 2011, 2011 Sixteenth IEEE European Test Symposium.
[3] Ramesh Karri,et al. Scan attack in presence of mode-reset countermeasure , 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).
[4] Ramesh Karri,et al. Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard , 2004 .
[5] Ramesh Karri,et al. Attacks and Defenses for JTAG , 2010, IEEE Design & Test of Computers.
[6] Ramesh Karri,et al. New scan-based attack using only the test mode , 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).
[7] Bruno Rouzeyre,et al. Test control for secure scan designs , 2005, European Test Symposium (ETS'05).
[8] Giorgio Di Natale,et al. A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures , 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).
[9] Nozomu Togawa,et al. Scan-Based Side-Channel Attack against RSA Cryptosystems Using Scan Signatures , 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[10] Vincent Rijmen,et al. The Design of Rijndael: AES - The Advanced Encryption Standard , 2002 .