High voltage wiring using biased polysilicon field plates
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[1] R.A. Martin,et al. 850V NMOS driver with active outputs , 1984, 1984 International Electron Devices Meeting.
[2] Philip K. T. Mok,et al. Interconnect Induced Breakdown in HVICs , 1989 .
[3] A.W. Ludikhuize. A versatile 250/300-V IC process for analog and switching applications , 1986, IEEE Transactions on Electron Devices.
[4] A.F.J. Murray,et al. Parasitic breakdown control in HVIC process integration , 1991, ESSDERC '91: 21st European Solid State Device Research Conference.
[5] N. Fujishima,et al. A novel field plate structure under high voltage interconnections , 1990, Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90..
[6] Y. Sugawara,et al. Field reduction regions for compact high-voltage IC's , 1987, IEEE Transactions on Electron Devices.
[7] W. Gerlach,et al. Influence of interconnections onto the breakdown voltage of planar high-voltage p-n junctions , 1993 .
[8] J. Appels,et al. High voltage thin layer devices (RESURF devices) , 1979, 1979 International Electron Devices Meeting.
[9] V.A.K. Temple,et al. Junction termination extension (JTE), A new technique for increasing avalanche breakdown voltage and controlling surface electric fields in P-N junctions , 1977, 1977 International Electron Devices Meeting.