Reconfigurable Technologies for Next Generation Internet and Cluster Computing

RECONFIGURABLE TECHNOLOGIES FOR NEXT GENERATION INTERNET AND CLUSTER COMPUTING

[1]  S. M. Bellovin,et al.  Security problems in the TCP/IP protocol suite , 1989, CCRV.

[2]  Geoffrey C. Fox,et al.  Twister: a runtime for iterative MapReduce , 2010, HPDC '10.

[3]  Eric Keller,et al.  Virtualizing the data plane through source code merging , 2008, PRESTO '08.

[4]  Hosting Virtual Networks on Commodity Hardware , 2007 .

[5]  Mark Handley,et al.  Evaluating Xen for Router Virtualization , 2007, 2007 16th International Conference on Computer Communications and Networks.

[6]  Naga K. Govindaraju,et al.  Mars: A MapReduce Framework on graphics processors , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

[7]  W. Luk,et al.  Axel: a heterogeneous cluster with FPGAs and GPUs , 2010, FPGA '10.

[8]  Bruce Hendrickson,et al.  The Chaco user`s guide. Version 1.0 , 1993 .

[9]  John W. Lockwood,et al.  Reprogrammable network packet processing on the field programmable port extender (FPX) , 2001, FPGA '01.

[10]  Yanfeng Zhang,et al.  iMapReduce: A Distributed Computing Framework for Iterative Computation , 2011, Journal of Grid Computing.

[11]  Fred Kuhns,et al.  Supercharging planetlab: a high performance, multi-application, overlay network platform , 2007, SIGCOMM '07.

[12]  Sergey Brin,et al.  The Anatomy of a Large-Scale Hypertextual Web Search Engine , 1998, Comput. Networks.

[13]  Glen Gibb,et al.  A Packet Generator on the NetFPGA Platform , 2009, 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines.

[14]  Shankar Kumar,et al.  Video suggestion and discovery for youtube: taking random walks through the view graph , 2008, WWW.

[15]  Raouf Boutaba,et al.  A survey of network virtualization , 2010, Comput. Networks.

[16]  Nick Mathewson,et al.  Tor: The Second-Generation Onion Router , 2004, USENIX Security Symposium.

[17]  Nick Feamster,et al.  Building a fast, virtualized data plane with programmable hardware , 2009, CCRV.

[18]  Karthikeyan Sankaralingam,et al.  Power challenges may end the multicore era , 2013, CACM.

[19]  Russell Tessier,et al.  FPGA Architecture: Survey and Challenges , 2008, Found. Trends Electron. Des. Autom..

[20]  Satnam Singh,et al.  Reconfigurable Data Processing for Clouds , 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.

[21]  Bruce M. Maggs,et al.  Cutting the electric bill for internet-scale systems , 2009, SIGCOMM '09.

[22]  Yanfeng Zhang,et al.  PrIter: A Distributed Framework for Prioritizing Iterative Computations , 2011, IEEE Transactions on Parallel and Distributed Systems.

[23]  Nick Feamster,et al.  SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware , 2010, SIGCOMM '10.

[24]  Nick Feamster,et al.  Trellis: a platform for building flexible, fast virtual networks on commodity hardware , 2008, CoNEXT '08.

[25]  Glen Gibb,et al.  NetFPGA: reusable router architecture for experimental research , 2008, PRESTO '08.

[26]  Gordon J. Brebner,et al.  Hyper-programmable architectures for adaptable networked systems , 2004, Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004..

[27]  Nick Feamster,et al.  In VINI veritas: realistic and controlled network experimentation , 2006, SIGCOMM.

[28]  Seda Ogrenci Memik,et al.  Design and analysis of a layer seven network processor accelerator using reconfigurable logic , 2002, Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[29]  Naftali Tishby,et al.  Unsupervised document classification using sequential information maximization , 2002, SIGIR '02.

[30]  Yi Wang,et al.  Virtual routers on the move: live router migration as a network-management primitive , 2008, SIGCOMM '08.

[31]  Santosh S. Vempala,et al.  Path splicing , 2008, SIGCOMM '08.

[32]  Nick McKeown,et al.  Routing lookups in hardware at memory access speeds , 1998, Proceedings. IEEE INFOCOM '98, the Conference on Computer Communications. Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies. Gateway to the 21st Century (Cat. No.98.

[33]  Gordon J. Brebner Packets everywhere: The great opportunity for field programmable technology , 2009, 2009 International Conference on Field-Programmable Technology.

[34]  Weijia Shang,et al.  ShapeUp: A High-Level Design Approach to Simplify Module Interconnection on FPGAs , 2010, 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines.

[35]  Nick McKeown,et al.  OpenFlow: enabling innovation in campus networks , 2008, CCRV.

[36]  Jon M. Kleinberg,et al.  The link-prediction problem for social networks , 2007, J. Assoc. Inf. Sci. Technol..

[37]  Lixin Gao,et al.  Europa: Efficient User Mode Packet Forwarding in Network Virtualization , 2010, INM/WREN.

[38]  Amin Vahdat,et al.  Chimpp: A Click-based programming and simulation environment for reconfigurable networking hardware , 2010, 2010 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

[39]  John W. Lockwood,et al.  Dynamic hardware plugins in an FPGA with partial run-time reconfiguration , 2002, DAC '02.

[40]  Stamatis Vassiliadis,et al.  Analysis of a reconfigurable network processor , 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

[41]  Eddie Kohler,et al.  The Click modular router , 1999, SOSP.

[42]  Leo Katz,et al.  A new status index derived from sociometric analysis , 1953 .

[43]  Sujata Banerjee,et al.  Measuring Bandwidth Between PlanetLab Nodes , 2005, PAM.

[44]  Jonathan S. Turner A proposed architecture for the GENI backbone platform , 2006, 2006 Symposium on Architecture For Networking And Communications Systems.

[45]  Lixin Gao,et al.  Accelerate large-scale iterative computation through asynchronous accumulative updates , 2012, ScienceCloud '12.

[46]  Walid Dabbous,et al.  Survey and taxonomy of IP address lookup algorithms , 2001, IEEE Netw..

[47]  Sanjay Ghemawat,et al.  MapReduce: Simplified Data Processing on Large Clusters , 2004, OSDI.

[48]  Larry L. Peterson,et al.  Container-based operating system virtualization: a scalable, high-performance alternative to hypervisors , 2007, EuroSys '07.

[49]  Lixin Gao,et al.  ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization , 2011, 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems.

[50]  Randy H. Katz,et al.  Improving MapReduce Performance in Heterogeneous Environments , 2008, OSDI.

[51]  Vipin Kumar,et al.  A Fast and High Quality Multilevel Scheme for Partitioning Irregular Graphs , 1998, SIAM J. Sci. Comput..

[52]  Accelerating High-Performance Computing With FPGAs , 1998 .

[53]  Lixin Gao,et al.  Accelerating iterative algorithms with asynchronous accumulative updates on FPGAs , 2013, 2013 International Conference on Field-Programmable Technology (FPT).

[54]  Paul Chow,et al.  Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2000, Monterey, CA, USA, February 10-11, 2000 , 2000, FPGA.

[55]  John W. Lockwood,et al.  Control and configuration software for a reconfigurable networking hardware platform , 2002, Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[56]  Nick McKeown,et al.  NetFPGA: A Tool for Network Research and Education , 2006 .

[57]  Kotagiri Ramamohanarao,et al.  Survey of network-based defense mechanisms countering the DoS and DDoS problems , 2007, CSUR.

[58]  Lixin Gao,et al.  PdP: parallelizing data plane in virtual network substrate , 2009, VISA '09.

[59]  Chuanxiong Guo,et al.  CAFE: a configurable packet forwarding engine for data center networks , 2009, PRESTO '09.

[60]  Lixin Gao,et al.  Customizing virtual networks with partial FPGA reconfiguration , 2011, CCRV.

[61]  Madhav P. Desai,et al.  AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs , 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

[62]  Ion Stoica,et al.  ROFL: routing on flat labels , 2006, SIGCOMM '06.

[63]  Fang Hao,et al.  Building Scalable Virtual Routers with Trie Braiding , 2010, 2010 Proceedings IEEE INFOCOM.

[64]  Constantine Dovrolis,et al.  The evolution of layered protocol stacks leads to an hourglass-shaped architecture , 2011, SIGCOMM.

[65]  Yu Wang,et al.  FPMR: MapReduce framework on FPGA , 2010, FPGA '10.

[66]  Philip Heng Wai Leong,et al.  Map-reduce as a Programming Model for Custom Computing Machines , 2008, 2008 16th International Symposium on Field-Programmable Custom Computing Machines.

[67]  Antony I. T. Rowstron,et al.  Cashmere: resilient anonymous routing , 2005, NSDI.

[68]  Alan L. Cox,et al.  Optimizing network virtualization in Xen , 2006 .

[69]  Jing Fu,et al.  Efficient IP-address lookup with a shared forwarding table for multiple virtual routers , 2008, CoNEXT '08.