IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements

This paper presents IMAPCAR, a 100GOPS programmable highly parallel vision processor LSI consuming less than 2 W of power for in-vehicle vision tasks of driver assistance systems. First, requirements of vision processors for driver assistance systems as well as the characteristics of vision tasks for safety are summarized. Next, features in the design of IMAPCAR are described in detail, which comparing with a previous design, improved the performance for major vision tasks by a factor of 2.5 while reduced 50% of power. Design choices taken by other in-vehicle vision processors are also compared and analyzed. Finally, technology perspectives of future in-vehicle vision processors are discussed.

[1]  E. Alon,et al.  The implementation of a 2-core, multi-threaded itanium family processor , 2006, IEEE Journal of Solid-State Circuits.

[2]  Shorin Kyo,et al.  A robust vehicle detecting and tracking system for wet weather conditions using the IMAP-VISION image processing board , 1999, Proceedings 199 IEEE/IEEJ/JSAI International Conference on Intelligent Transportation Systems (Cat. No.99TH8383).

[3]  I. Kuroda,et al.  A 51.2 GOPS scalable video recognition processor for intelligent cruise control based on a linear array of 128 4-way VLIW processing elements , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[4]  K Sakurai,et al.  IMPLEMENTATION OF OVERTAKING VEHICLE DETECTION USING IMAPCAR HIGHLY PARALLEL IMAGE PROCESSOR , 2006 .

[5]  Zehang Sun,et al.  On-road vehicle detection: a review , 2006, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[6]  S. Asano,et al.  A 4 GOPS 3 way-VLIW image recognition processor based on a configurable media-processor , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[7]  Liang-Gee Chen,et al.  iVisual: An Intelligent Visual Sensor SoC with 2790fps CMOS Image Sensor and 205GOPS/W Vision Processor , 2008, ISSCC.

[8]  A. Suga,et al.  A 51.2 GOPS 1.0 GB/s-DMA single-chip multi-processor integrating quadruple 8-way VLIW processors , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[9]  Paul Wielage,et al.  XETAL-II: A 107 GOPS, 600mW Massively-Parallel Processor for Video Scene Analysis , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[10]  K. Maeda,et al.  Visconti: multi-VLIW image recognition processor based on configurable processor [obstacle detection applications] , 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..

[11]  Paul Wielage,et al.  Xetal: a low-power high-performance smart camera processor , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[12]  Ulrich Ramacher,et al.  A 100-GOPS programmable processor for vehicle vision systems , 2003, IEEE Design & Test of Computers.

[13]  Shorin Kyo,et al.  Media Processing LSI Architectures for Automotives - Challenges and Future Trends - , 2007, IEICE Trans. Electron..

[14]  Shorin Kyo,et al.  A low-cost mixed-mode parallel processor architecture for embedded systems , 2007, ICS '07.

[15]  Shorin Kyo,et al.  An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems , 2005, ISCA 2005.

[16]  J. Hart,et al.  Implementation of a 4/sup th/-generation 1.8GHz dual-core SPARC V9 microprocessor , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[17]  Shoji Muramatsu,et al.  Image processing device for automotive vision systems , 2002, Intelligent Vehicle Symposium, 2002. IEEE.