Minimisation of fixed-polarity AND/XOR canonical networks
暂无分享,去创建一个
[1] B. Harking. Efficient algorithm for canonical Reed-Muller expansions of Boolean functions , 1990 .
[2] R. Bryant. Graph-Based Algorithms for Boolean Function Manipulation12 , 1986 .
[3] J. M. Saul. Logic synthesis for arithmetic circuits using the Reed-Muller representation , 1992, [1992] Proceedings The European Conference on Design Automation.
[4] Harold Fleisher,et al. A Computer Algorithm for Minimizing Reed-Muller Canonical Forms , 1987, IEEE Transactions on Computers.
[5] Amar Mukhopadhyay,et al. Minimization of Exclusive or and Logical Equivalence Switching Circuits , 1970, IEEE Transactions on Computers.
[6] Wolfgang Rosenstiel,et al. Efficient graph-based computation and manipulation of functional decision diagrams , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.
[7] J. Miller,et al. Optimization of Reed-Muller logic functions , 1993 .
[8] Malgorzata Marek-Sadowska,et al. Boolean Matching Using Generalized Reed-Muller Forms , 1994, 31st Design Automation Conference.
[9] Xia Chen,et al. Mapping of Reed-Muller coefficients and the minimisation of exclusive OR-switching functions , 1982 .
[10] Malgorzata Marek-Sadowska,et al. Efficient minimization algorithms for fixed polarity AND/XOR canonical networks , 1993, [1993] Proceedings Third Great Lakes Symposium on VLSI-Design Automation of High Performance VLSI Systems.
[11] P.J.W. Rayner,et al. Minimisation of Reed-Muller polynomials with fixed polarity , 1984 .
[12] D. H. Green. Reed-Muller expansions of incompletely specified functions , 1987 .
[13] Tsutomu Sasao,et al. Minimization of AND-EXOR Expressions Using Rewrite Rules , 1993, IEEE Trans. Computers.
[14] Tri-state map for the minimisation of exclusive-OR switching functions , 1989 .
[15] Marek A. Perkowski,et al. Fast exact and quasi-minimal minimization of highly testable fixed-polarity AND/XOR canonical networks , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[16] P. Besslich. Efficient computer method for ExOR logic design , 1983 .
[17] Malgorzata Marek-Sadowska,et al. Detecting Symmetric Variables in Boolean Functions using Generalized Reel-Muller Forms , 1994, ISCAS.
[18] S. M Reddy,et al. Easily testable realizations for logic functions , 1973 .
[19] Tsutomu Sasao,et al. On the complexity of mod-2l sum PLA's , 1990 .
[20] Jean-Pierre Deschamps,et al. Discrete and switching functions , 1978 .