Development of TSV simulator: FASTsv

The increasing need for functionality and portability in consumer electronics is pushing the microelectronics industry to develop more effective interconnection techniques. This has resulted in the birth of 3D stacking of chips, which is achieved by the use of TSV (Through-Silicon-Via) technology. This paper puts forward a TSV simulator, FASTsv (Fast and Accurate Simulator of TSV: FASTsv). The key technologies in TSV process include DRIE (deep reactive ion etching) and PECVD (plasma-enhanced chemical vapor deposition) processes. Based on experimental results and theoretical analysis, the modeling of DRIE and PECVD processes are developed. Experimental tests are performed to verify the TSV simulator. The simulation results agree with experimental results very well.

[1]  Yangyuan Wang,et al.  Simulation of profile evolution in etching-polymerization alternation in DRIE of silicon with SF/sub 6//C/sub 4/F/sub 8/ , 2003, The Sixteenth Annual International Conference on Micro Electro Mechanical Systems, 2003. MEMS-03 Kyoto. IEEE.

[2]  Yangyuan Wang,et al.  Simulation of the Bosch process with a string-cell hybrid method , 2004 .

[3]  S. Burkett,et al.  Process integration for through-silicon vias , 2005 .

[4]  Haixia Zhang,et al.  Parameters extraction for DRIE model , 2008, 2008 3rd IEEE International Conference on Nano/Micro Engineered and Molecular Systems.

[5]  Seung Wook Yoon,et al.  3D TSV processes and its assembly/packaging technology , 2009, 2009 IEEE International Conference on 3D System Integration.