A Review of Smart Grid Communication Technologies
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[1] Periklis Chatzimisios,et al. Chapter 26 – A Survey on Smart Grid Communications: From an Architecture Overview to Standardization Activities , 2013 .
[2] H. T. Mouftah,et al. Wireless multimedia sensor and actor networks for the next generation power grid , 2011, Ad Hoc Networks.
[3] G.S. Sohi,et al. Dynamic instruction reuse , 1997, ISCA '97.
[4] Quinn Jacobson,et al. Control flow speculation in multiscalar processors , 1997, Proceedings Third International Symposium on High-Performance Computer Architecture.
[5] Laurie J. Hendren,et al. Context-sensitive interprocedural points-to analysis in the presence of function pointers , 1994, PLDI '94.
[6] Ken Kennedy,et al. Automatic translation of FORTRAN programs to vector form , 1987, TOPL.
[7] Utpal Banerjee,et al. Dependence analysis for supercomputing , 1988, The Kluwer international series in engineering and computer science.
[8] Gerhard P. Hancke,et al. Opportunities and Challenges of Wireless Sensor Networks in Smart Grid , 2010, IEEE Transactions on Industrial Electronics.
[9] Monica S. Lam,et al. Efficient context-sensitive pointer analysis for C programs , 1995, PLDI '95.
[10] Mahesh Sooriyabandara,et al. Smart Grid Communications: Overview of Research Challenges, Solutions, and Standardization Activities , 2011, IEEE Communications Surveys & Tutorials.
[11] B Hamilton,et al. Benefits of the Smart Grid [In My View] , 2011 .
[12] Mark Schlack,et al. Digital Equipment Corp. , 1993 .
[13] Salman Mohagheghi,et al. Demand Response Architecture: Integration into the Distribution Management System , 2010, 2010 First IEEE International Conference on Smart Grid Communications.
[14] Doug Hunt,et al. Advanced performance features of the 64-bit PA-8000 , 1995, Digest of Papers. COMPCON'95. Technologies for the Information Superhighway.
[15] John R. Ellis,et al. Bulldog: A Compiler for VLIW Architectures , 1986 .
[16] Manoj Franklin,et al. The multiscalar architecture , 1993 .
[17] Scott A. Mahlke,et al. Sentinel scheduling for VLIW and superscalar processors , 1992, ASPLOS V.
[18] John Paul Shen,et al. Speculative disambiguation: a compilation technique for dynamic memory disambiguation , 1994, ISCA '94.
[19] Gerhard P. Hancke,et al. Industrial Wireless Sensor Networks: Challenges, Design Principles, and Technical Approaches , 2009, IEEE Transactions on Industrial Electronics.
[20] Gurindar S. Sohi,et al. The anatomy of the register file in a multiscalar processor , 1994, Proceedings of MICRO-27. The 27th Annual IEEE/ACM International Symposium on Microarchitecture.
[21] Mikko H. Lipasti,et al. Exceeding the dataflow limit via value prediction , 1996, Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29.
[22] Scott A. Mahlke,et al. Dynamic memory disambiguation using the memory conflict buffer , 1994, ASPLOS VI.