LH-Bist for digital correction of ADC offset

In this paper, we show that it is possible to use Built-In-Self-Test circuitry to correct some errors of the ADC under test. We take the example of LH-BIST architecture we have previously developed to measure the ADC offset value. The interest of LH-BIST architecture is that one of its regers is directly connected to the output of the convert. Hence, this register can be use to digitally mod the running code of ADC according to offset value extract by this very LH-BIST circuitry.

[1]  Godi Fischer,et al.  Digital correction of circuit imperfections in cascaded /spl Sigma/-/spl Delta/ modulators composed of 1st-order sections , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[2]  Michel Renovell,et al.  A high accuracy triangle-wave signal generator for on-chip ADC testing , 2002, Proceedings The Seventh IEEE European Test Workshop.

[3]  Gabor C. Temes,et al.  A high-resolution multibit Sigma Delta ADC with digital correction and relaxed amplifier requirements , 1993 .

[4]  Taco Zwemstra,et al.  Built-in self-test methodology for A/D converters , 1997, Proceedings European Design and Test Conference. ED & TC 97.

[5]  Florence Azaïs,et al.  A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs , 2001, J. Electron. Test..

[6]  Gordon W. Roberts,et al.  Analog Signal Generation for Built-In-Self-Test of Mixed-Signal Integrated Circuits , 1995 .

[7]  Edgar Sánchez-Sinencio,et al.  Auto-calibrating analog timer for on-chip testing , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[8]  Gordon W. Roberts,et al.  An analog multi-tone signal generator for built-in-self-test applications , 1994, Proceedings., International Test Conference.

[9]  Florence Azaïs,et al.  A low-cost adaptive ramp generator for analog BIST applications , 2001, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001.

[10]  Un-Ku Moon,et al.  Adaptive digital correction of analog errors in MASH ADCs. II. Correction using test-signal injection , 2000 .