A Scalable Mextram Model for Advanced Bipolar Circuit Design

In this thesis, a referenced based scaling approach and its parameter extraction for the bipolar transistor model Mextram is proposed. It is mainly based on the physical properties of the Mextram parameters, which scale with the junction temperature and geometry of the bipolar transistor. The scalable electrical parameter in the scaling rules is normalized to a reference parameter at reference temperature and geometry. The scalable model is implemented in AHDL Verilog-A language, which can be used in many commercial simulators. Along with the scalable model, a unified extraction procedure for temperature and geometry parameters of the scalable model has been implemented in an IC-CAP model file using an example of high-speed SiGe HBT technology as a case study. The essential feature of the extraction methodology is a direct extraction of the temperature and geometry parameters from the measured electrical characteristics. The electrical model parameters as the reference parameters are extracted only once for a single reference temperature and geometry. No additional tool for temperature and geometry parameter extraction is needed. As a result, the accuracy is improved and the scalable model library generation time is greatly reduced.

[1]  Michael Schroter,et al.  A generalized integral charge-control relation and its application to compact models for silicon-based HBT's , 1993 .

[2]  M. Reisch,et al.  High-frequency Bipolar Transistors , 2003 .

[3]  J. Laskar,et al.  A distributed scalable SiGe power device large signal model based on MEXTRAM 504 , 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.

[4]  J.A.M. Geelen,et al.  An improved de-embedding technique for on-wafer high-frequency characterization , 1991, Proceedings of the 1991 Bipolar Circuits and Technology Meeting.

[5]  H. K. Gummel A charge control relation for bipolar transistors , 1970, Bell Syst. Tech. J..

[6]  R. Brock,et al.  QUBiC4: a silicon RF-BiCMOS technology for wireless communication ICs , 2001, Proceedings of the 2001 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.01CH37212).

[7]  G.J. Coram,et al.  How to (and how not to) write a compact model in Verilog-A , 2004, Proceedings of the 2004 IEEE International Behavioral Modeling and Simulation Conference, 2004. BMAS 2004..

[8]  Joachim N. Burghartz,et al.  Extraction of collector resistances for device characterization and compact models , 2006 .

[9]  D. O. Pederson,et al.  SLIC-a simulator for linear integrated circuits , 1971 .

[10]  R. Dekker,et al.  RF power large signal modeling with MEXTRAM , 1996, Proceedings of the 1996 BIPOLAR/BiCMOS Circuits and Technology Meeting.

[11]  D.B.M. Klaassen,et al.  Improved extraction of base and emitter resistance from small signal high frequency admittance measurements , 1999, Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024).

[12]  Qi-Jun Zhang,et al.  Neural Networks for RF and Microwave Design , 2000 .

[13]  Tak H. Ning,et al.  History and future perspective of the modern silicon bipolar transistor , 2001 .

[14]  H. C. Poon,et al.  An integral charge control model of bipolar transistors , 1970, Bell Syst. Tech. J..

[15]  Franco Mastri,et al.  Computer-aided noise analysis of MESFET and HEMT mixers , 1989 .

[16]  M. Schroter,et al.  A compact tunneling current and collector breakdown model , 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).

[17]  James S. Dunn,et al.  Status and Direction of Communication Technologies - SiGe BiCMOS and RFCMOS , 2005, Proceedings of the IEEE.

[18]  J.C.J. Paasschens,et al.  An S-parameter technique for substrate resistance characterization of RF bipolar transistors , 2000, Proceedings of the 2000 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.00CH37124).

[19]  H. Groendijk Modeling base crowding in a bipolar transistor , 1973 .

[20]  R. J. Havens,et al.  A calibrated lumped-element de-embedding technique for on-wafer RF characterization of high-quality inductors and high-speed transistors , 2003 .

[21]  H.C. de Graaff,et al.  Extension of the collector charge description for compact bipolar epilayer models , 1995, ESSDERC '95: Proceedings of the 25th European Solid State Device Research Conference.

[22]  R. M. Warner Microelectronics: its unusual origin and personality , 2001 .

[23]  H.C. de Graaff,et al.  New formulation of the current and charge relations in bipolar transistor modeling for CACD purposes , 1985, IEEE Transactions on Electron Devices.

[24]  R. Scholz,et al.  Implementation of a scalable VBIC model for SiGe:C HBTs , 2006 .

[25]  J.N. Burghartz,et al.  A Reference Geometry Based Scaling Approach for Bipolar Transistor Model Mextram , 2005, EUROCON 2005 - The International Conference on "Computer as a Tool".

[26]  H. Stubing,et al.  A compact physical large-signal model for high-speed bipolar transistors at high current densities—Part I: One-dimensional model , 1987, IEEE Transactions on Electron Devices.

[27]  M. Latif,et al.  Network Analysis Approach to Multidimensional Modeling of Transistors Including Thermal Effects , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[28]  D.B.M. Klaassen,et al.  A unified mobility model for device simulation—II. Temperature dependence of carrier mobility and lifetime , 1992 .

[29]  J. Victory,et al.  A new robust on-wafer 1/f noise measurement and characterization system , 2001, ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153).

[30]  B. Troyanovsky,et al.  Analog RF model development with Verilog-A , 2005, 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers.

[31]  J. Cressler,et al.  The influence of Ge grading on the bias and temperature characteristics of SiGe HBTs for precision analog circuits , 2000 .

[32]  Willy Sansen,et al.  Characterization and measurement of the base and emitter resistances of bipolar transistors , 1972 .

[33]  R. Mcintyre Multiplication noise in uniform avalanche diodes , 1966 .

[34]  R. Hall Electron-Hole Recombination in Germanium , 1952 .

[35]  J.N. Burghartz,et al.  Lithography for the 32-nm Node and Beyond , 2006, 2006 Bipolar/BiCMOS Circuits and Technology Meeting.

[36]  S. Wada,et al.  Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS , 2003, IEEE International Electron Devices Meeting 2003.

[37]  A 2D simulation study on the d.c. and transient behaviour of a SiGe-base heterojunction bipolar device with an extended germanium profile into the n-epi region with application to an ECL buffer , 1996 .

[38]  Robert A. Groves,et al.  A scaleable, statistical SPICE Gummel-Poon model for SiGe HBTs , 1998 .

[39]  D.D. Tang,et al.  Method for determining the emitter and base series resistances of bipolar transistors , 1984, IEEE Transactions on Electron Devices.

[40]  Ken Kundert,et al.  The designer's guide to Verilog-AMS , 2004 .

[41]  H.C. de Graaff,et al.  A new extraction technique for the series resistances of semiconductor devices based on the intrinsic properties of bias-dependent y-parameters [bipolar transistor examples] , 2004, Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting.

[42]  R. de Kort,et al.  Modelling the excess noise due to avalanche multiplication in (hetero-junction) bipolar transistors , 2004, Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting.

[43]  Bernard S. Meyerson,et al.  Low‐temperature silicon epitaxy by ultrahigh vacuum/chemical vapor deposition , 1986 .

[44]  W. J. Kloosterman,et al.  A comprehensive bipolar avalanche multiplication compact model for circuit simulation , 2000, Proceedings of the 2000 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.00CH37124).

[45]  Michael Schroter,et al.  Simulation and modeling of the low-frequency base resistance of bipolar transistors and its dependence on current and geometry , 1991 .

[46]  G. Hurkx On the modelling of tunnelling currents in reverse-biased p-n junctions , 1989 .

[47]  H. Cho,et al.  A three-step method for the de-embedding of high-frequency S-parameter measurements , 1991 .

[48]  H. C. de Graaff,et al.  Avalanche multiplication in a compact bipolar transistor model for circuit simulation , 1989 .

[49]  M.B. Ketchen,et al.  An advanced high-performance trench-isolated self-aligned bipolar technology , 1987, IEEE Transactions on Electron Devices.

[50]  I. Getreu,et al.  Modeling the bipolar transistor , 1978 .

[51]  V. d'Alessandro,et al.  Extraction and modeling of self-heating and mutual thermal coupling impedance of bipolar transistors , 2004, IEEE Journal of Solid-State Circuits.

[52]  V. Cuoco Smoothie : A model for linearity optimization of FET devices in RF applications , 2006 .

[53]  J. N. Ellis,et al.  The 2N3055: a case history , 2001 .

[54]  R. Barth,et al.  A low-parasitic collector construction for high-speed SiGe:C HBTs , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

[55]  C. C. McAndrew,et al.  VBIC95, the vertical bipolar inter-company model , 1996, IEEE J. Solid State Circuits.

[56]  J. Burghartz,et al.  Mixed compact and behavior modeling using AHDL Verilog-A , 2003, Proceedings of the 2003 IEEE International Workshop on Behavioral Modeling and Simulation.

[57]  E. Vandamme,et al.  Improved three-step de-embedding method to accurately account for the influence of pad parasitics in silicon on-wafer RF test-structures , 2001 .

[58]  M. Pfost,et al.  Modeling and measurement of substrate coupling in Si-bipolar IC's up to 40 GHz , 1998 .

[59]  Gregory G. Freeman,et al.  A scalable, statistical SPICE Gummel-Poon model for SiGe HBTs , 1997, Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting.

[60]  J. N. Burghartz,et al.  A Unifled Parameter Extraction Procedure for Scalable Bipolar Transistor Model Mextram , 2006 .

[61]  Seonghearn Lee,et al.  A new parameter extraction technique for small-signal equivalent circuit of polysilicon emitter bipolar transistors , 1994 .

[62]  J. Ebers,et al.  Large-Signal Behavior of Junction Transistors , 1954, Proceedings of the IRE.

[63]  J. Burghartz,et al.  Parameters extraction of a scalable Mextram model for high-speed SiGe HBTs , 2004, Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting.

[64]  Chih-Wen Liu,et al.  The comparison of isolation technologies and device models on SiGe bipolar low noise amplifier , 2004 .

[65]  S. Sze Semiconductor Devices: Physics and Technology , 1985 .

[66]  Herbert Kroemer,et al.  Two integral relations pertaining to the electron transport through a bipolar transistor with a nonuniform energy gap in the base region , 1985 .