Bit-Length Optimization Method for High-Level Synthesis Based on Non-linear Programming Technique

High-level synthesis is a novel method to generate a RT-level hardware description automatically from a high-level language such as C, and is used at recent digital circuit design. Floating-point to fixed-point conversion with bit-length optimization is one of the key issues for the area and speed optimization in high-level synthesis. However, the conversion task is a rather tedious work for designers. This paper introduces automatic bit-length optimization method on floating-point to fixed-point conversion for high-level synthesis. The method estimates computational errors statistically, and formalizes an optimization problem as a non-linear problem. The application of NLP technique improves the balancing between computational accuracy and total hardware cost. Various constraints such as unit sharing, maximum bit-length of function units can be modeled easily, too. Experimental result shows that our method is fast compared with typical one, and reduces the hardware area.

[1]  Daniel Ménard,et al.  Automatic evaluation of the accuracy of fixed-point algorithms , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[2]  George A. Constantinides.  Perturbation analysis for word-length optimization , 2003, 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003..

[3]  Wayne Luk,et al.  Wordlength optimization for linear digital signal processing , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Rob A. Rutenbar,et al.  Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[5]  Kazuyoshi Takagi,et al.  Hardware Synthesis from C Programs with Estimation of Bit Length of Variables , 1999 .

[6]  De Figueiredo,et al.  Self-validated numerical methods and applications , 1997 .

[7]  Kazutoshi Wakabayashi,et al.  C-based synthesis experiences with a behavior synthesizer, "Cyber" , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[8]  Panos M. Pardalos,et al.  Quadratic programming with one negative eigenvalue is NP-hard , 1991, J. Glob. Optim..

[9]  Heinrich Meyr,et al.  System level fixed-point design based on an interpolative approach , 1997, DAC.

[10]  Takashi Horiyama,et al.  Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis , 2003 .

[11]  Wonyong Sung,et al.  AUTOSCALER for C: an optimizing floating-point to integer C program converter for fixed-point digital signal processors , 2000 .

[12]  Seehyun Kim,et al.  Fixed-point error analysis and word length optimization of 8×8 IDCT architectures , 1998, IEEE Trans. Circuits Syst. Video Technol..