Effect of technology scaling on RF performance of the transistors fabricated by standard CMOS technology

Cut-off frequency (f<sub>T</sub>) of 300 GHz and 230 GHz for NMOS and PMOS is demonstrated for transistors with a gate length of 35 nm fabricated by 45 nm standard CMOS technology. Current gain (H<sub>21</sub>) and noise (flicker and thermal) is improved with scaling down technology. Power gain (G<sub>u</sub>) increase is slow down and even saturated at 45 nm as technology advances. Such saturation in power gain is attributed to rapid increase in g<sub>ds</sub> (drain conductance). Additional efforts are required to reduce g<sub>ds</sub> for continuous improvement in power gain with the scaling. V<sub>th</sub> optimization can be one of options to achieve better g<sub>ds</sub>.