论文信息 - Low-power SoC design techniques for Bluetooth/Bluetooth Low Energy

Low-power SoC design techniques for Bluetooth/Bluetooth Low Energy

Bluetooth and Bluetooth Low Energy are one of the most popular wireless standards for short range communications. One of the key features is low power operation to minimize form factor of sensor nodes including battery in the Internet-of-Things (IoT) era. Our latest Bluetooth Low Energy SoC achieves -92 dBm receiver sensitivity with 6.3 mA peak current consumption. Transmitter maximum output power is 0 dBm. Transceiver architecture together with analog and digital circuit techniques and power management techniques are discussed.

Hideaki Majima

[1] Takayasu Sakurai,et al. Highly Energy-Efficient SRAM With Hierarchical Bit Line Charge-Sharing Method Using Non-Selected Bit Line Charges , 2013, IEEE Journal of Solid-State Circuits.

[2] M. Yabuuchi,et al. A 20nm 0.6V 2.1µW/MHz 128kb SRAM with no half select issue by interleave wordline and hierarchical bitline scheme , 2013, 2013 Symposium on VLSI Technology.

[3] S. Kawaguchi,et al. A 65nm CMOS, 1.5-mm Bluetooth transceiver with integrated antenna filter for Co-existence with a WCDMA transmitter , 2012, 2012 IEEE Asian Solid State Circuits Conference (A-SSCC).

[4] Yasuhisa Takeyama,et al. 13.4 A 7ns-access-time 25μW/MHz 128kb SRAM for low-power fast wake-up MCU in 65nm CMOS with 27fA/b retention current , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).