A real-time center-of-mass tracker circuit implemented by neuron MOS technology

A new architecture integrated circuit has been developed as a key element of a system that can real-time track the center of mass of an moving image on a two-dimensional (2-D) pixel array. The circuit has been implemented using a high-functionality transistor called neuron MOSFET (neuMOS or /spl nu/MOS for short), hence having a very simple circuit configuration. A quasi-two-dimensional algorithm is assumed for system in the circuit. A one-dimensional (1-D) array of neuron MOS circuits automatically finds the center-of-mass location using the image intensity distribution projected onto the x or y axis. The unique feature of the circuit is that it accepts analog inputs without A/D conversion but produces binary outputs, thus providing a very smooth interfacing between the real world and digital systems. Test circuits have been fabricated by a double-polysilicon CMOS process and their operation has been experimentally demonstrated.

[1]  G. Petersson,et al.  Position sensitive light detectors with high linearity , 1978 .

[2]  Berthold K. P. Horn,et al.  An object position and orientation IC with embedded imager , 1991 .

[3]  Tadashi Shibata,et al.  Clocked-neuron-MOS logic circuits employing auto-threshold-adjustment , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

[4]  Tadashi Shibata,et al.  Real-time reconfigurable logic circuits using neuron MOS transistors , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[5]  Masatoshi Ishikawa.  A Method for Measuring the Center Position and the Total Intensity of an Output Distribution of Matrix Positioned Sensors , 1983 .

[6]  Tadashi Shibata,et al.  An excellent weight-updating-linearity EEPROM synapse memory cell for self-learning Neuron-MOS neural networks , 1993 .

[7]  Sunetra K. Mendis,et al.  A 128/spl times/128 CMOS active pixel image sensor for highly integrated imaging systems , 1993, Proceedings of IEEE International Electron Devices Meeting.

[8]  Masatoshi Ishikawa,et al.  Target tracking algorithm for 1 ms visual feedback system using massively parallel processing , 1996, Proceedings of IEEE International Conference on Robotics and Automation.

[9]  W. Pitts,et al.  A Logical Calculus of the Ideas Immanent in Nervous Activity (1943) , 2021, Ideas That Created the Future.

[10]  T. Ohmi,et al.  Advances in neuron-MOS applications , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[11]  X. Arreguit,et al.  A CMOS motion detector system for pointing devices , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[12]  Tadashi Shibata,et al.  A neuron-MOS neural network using self-learning-compatible synapse circuits , 1995, IEEE J. Solid State Circuits.

[13]  Shigetoshi Sugawa,et al.  A 310 K pixel bipolar imager (BASIS) , 1990 .

[14]  Tadashi Shibata,et al.  A functional MOS transistor featuring gate-level weighted sum and threshold operations , 1992 .

[15]  Tadahiro Ohmi,et al.  Neuron MOS binary-logic integrated circuits. II. Simplifying techniques of circuit configuration and their practical applications , 1993 .

[16]  Masatoshi Ishikawa,et al.  A Method for Measuring the Center Position of a Two Dimensional Distributed Load Using Pressure-Conductive Rubber , 1982 .

[17]  Tadashi Shibata,et al.  Neuron MOS binary-logic integrated circuits. I. Design fundamentals and soft-hardware-logic circuit implementation , 1993 .

[18]  Tadashi Shibata,et al.  Neuron-MOS multiple-valued memory technology for intelligent data processing , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[19]  Akio Utsugi,et al.  Construction of inner space representation of latticed network circuits by learning , 1991, Neural Networks.

[20]  Tadashi Shibata,et al.  Neuron MOS winner-take-all circuit and its application to associative memory , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[21]  E. Fossum,et al.  CMOS active pixel image sensors for highly integrated imaging systems , 1997, IEEE J. Solid State Circuits.

[22]  Yoshio Nakamura,et al.  Design of bipolar imaging devices (BASIS): analysis of random noise , 1992 .