Reversed nested Miller compensation with current follower

The reversed nested-Miller compensation technique is reviewed by using a simple design-oriented approach. A single current follower is also exploited to provide right-half-plane zero removal while allowing wide band and preserving output swing. Thanks to the small compensation capacitors employed, the approach is suited for integration. SPICE simulations, using the parameters of a 0.8-/spl mu/m CMOS process, are in excellent agreement with theoretical derivations.

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