Hypothesis to Explain Threshold Drift due to Dynamic Bipolar Gate Stress

We supply a hypothesis that explains threshold voltage (Vth) drift under dynamic bipolar gate stress in SiC-MOSFETs, postulating that ionized donor-like interface traps in the lower half of the bandgap, give rise to an increased internal electric field at each rising edge of a gate voltage pulse. The enhancement of the internal electric field may be viewed as a Vth -reduction, and we devised different experiments to assess this Vth -reduction. Comparing Vth -drift rate using different pulse shapes in dynamic bipolar gate stress tests, we estimated a temporary Vth -reduction in the order of 15 V within 200 ns after the rising edge. Measuring the drain-source current peak 200 ns after the rising edge of a rectangular pulse, gives an estimate for the Vth -reduction of 5.5 V. To resolve this discrepancy, we postulate that in inversion, positive traps are effectively screened such that the impact on the channel is spatially restricted and smaller than the channel length. Channel current will only flow where positive charges induce a percolation path between drain and source, reducing the apparent Vth -reduction in the current based measurement.