Memory device having various delay

A memory device having variable delay is provided to improve speed margin of the memory device, by enabling to set small delay of a write enable signal and a read enable signal in a normal mode. A delay part(250) delays a pulse signal to generate a write enable signal and a read enable signal. A delay selection part(260) adjusts the pulse signal not to pass through the delay part in a normal mode, in order for the pulse signal to pass through the delay part in a test mode. The test mode is a burn-in test mode applying a high voltage to a memory device.