A four-channel time-interleaved 30-GS/s 6-bit ADC in 0.18 μm SiGe BiCMOS technology

Dear editor, Analog-to-digital converters (ADCs) with GHz bandwidth have widely been used in wideband communication systems, data acquisition systems and test and measurement instruments. As key elements of these systems, wideband high speed ADCs in multi-GHz range are in increasing demands. Folding and interpolating ADCs are perfectly suitable to these performance because of its direct conversion mode with limited hardware consumption [1]. Recently, the time-interleaved successive-approximate-register (TI SAR) ADCs have become an attractive architecture for high speed and moderate speed application in advanced nanometer CMOS technology for its small area and power efficiency [2]. They are very suitable for high volume system-on-chip (SOC) application. However, the production cost in the advanced silicon process is unbearable for the limited quantitive products. Compared with CMOS technology, SiGe BiCMOS technology has advantages of high speed, low 1/f noise, low mismatch and high reliability with low cost, which make it very suitable to built low volume high speed ADCs [3]. Additional, time-interleaving technique increases the conversion rate of a data converter by using a number of converters working in parallel for a simultaneous quantization of input samples. It can also reduce the die size and relax the requirements on fabrication process at the same time [4]. Hence, a fourchannel time-interleaved folding and interpolating (F&I) ADC was designed to achieve the target of 30-GHz sampling rate and 6-bit resolution.