Low-Supply Sensitivity LC VCOs With Complementary Varactors

The effects of supply-induced frequency variations on single-ended tuning <inline-formula> <tex-math notation="LaTeX">$LC$ </tex-math></inline-formula> voltage-controlled oscillator (VCO) which degrade the jitter performance of the clock are investigated. The first-order impact on the supply sensitivity is that the varactor’s effective capacitance varies with the supply voltage, with other second-order impacts attributed to commonly used capacitive bank and cross-coupled pairs. A compensation technique based on complementary varactors to improve the supply sensitivity of single-ended tuning <inline-formula> <tex-math notation="LaTeX">$LC$ </tex-math></inline-formula> VCO is proposed with no extra power dissipation, nor phase noise degradation within the relative frequency band of interest, along with the discussion on the operating principle of the compensation technique. Both the NMOS cross-coupled and complementary cross-coupled <inline-formula> <tex-math notation="LaTeX">$LC$ </tex-math></inline-formula> VCOs have been designed, demonstrating robust supply-insensitive performance over process, voltage, and temperature (PVT) variations. Prototyped oscillators were fabricated in a 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu {\mathrm{ m}}$ </tex-math></inline-formula> CMOS process to verify both the theoretical analysis and the effectiveness of the proposed technique. Measurement results show that the compensated topologies exhibit more than 93% reduction in periodic jitter versus the noncompensated counterparts, with the figures of merit (FoMs) among the best compared with previous supply insensitive works.

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