Limitations on the performance of field-effect devices for logic applications

The switching time and power dissipation of field-effect devices in integrated logic circuits are obtained using a simple equivalent circuit. It is seen that performance is determined by four basic parameters: channel length, operating voltage, parasitic capacitance, and saturation drift velocity. The effects limiting the optimization of these parameters are examined. It is found that channel length cannot be reduced below about 0.2 µm in the metal-oxide-semiconductor field-effect transistor (MOSFET) or below about 500 Å in the metal-semiconductor field-effect transistor (MESFET). Operating voltages cannot be reduced below about 750 mV due to subthreshold leakage. In the limit of extremely small sizes, the most promising high-speed devices appear to be MESFET structures in GaAs or InP.

[1]  J. Frey,et al.  Physical basis of short-channel MESFET operation , 1979 .

[2]  J. L. Moll,et al.  Design theory of a surface field-effect transistor , 1961 .

[3]  R. W. Coen,et al.  Velocity of surface carriers in inversion layers on silicon , 1980 .

[4]  R W Keyes,et al.  Physical Limits in Semiconductor Electronics , 1977, Science.

[5]  C. Sah.  Characteristics of the metal-Oxide-semiconductor transistors , 1964 .

[6]  R. Troutman,et al.  Subthreshold characteristics of insulated-gate field-effect transistors , 1973 .

[7]  F.M. Klaassen,et al.  Device down scaling and expected circuit performance , 1979, IEEE Transactions on Electron Devices.

[8]  V. L. Rideout,et al.  Very small MOSFET's for low-temperature operation , 1977, IEEE Transactions on Electron Devices.

[9]  R. Keyes,et al.  The role of low temperatures in the operation of logic circuitry , 1970 .

[10]  K. Steinhubl.  Design of Ion-Implanted MOSFET'S with Very Small Physical Dimensions , 1974 .

[11]  Yen-Chu Wang,et al.  Velocity overshoot effect on a short-gate microwave MESFET , 1979 .

[12]  Carver A. Mead,et al.  Schottky barrier gate field effect transistor , 1966 .

[13]  R. Zuleeg,et al.  Analysis of GaAs FET's for integrated logic , 1980, IEEE Transactions on Electron Devices.

[14]  R.C. Eden,et al.  MA-4 the prospects for ultra-high speed VLSI GaAs digital logic , 1978, IEEE Transactions on Electron Devices.

[15]  T. Maloney,et al.  Transient and steady‐state electron transport properties of GaAs and InP , 1977 .

[16]  C. Jacoboni,et al.  A review of some charge transport properties of silicon , 1977 .

[17]  P. Shah.  Refractory metal gate processes for VLSI applications , 1979, IEEE Transactions on Electron Devices.

[18]  A. K. Jonscher,et al.  Semiconductors at cryogenic temperatures , 1964 .

[19]  R.W. Keyes,et al.  A figure of merit for IC packaging , 1978, IEEE Journal of Solid-State Circuits.

[20]  W. Shockley,et al.  A Unipolar "Field-Effect" Transistor , 1952, Proceedings of the IRE.

[21]  Yutaka Hayashi,et al.  Diffusion Selfaligned MOST; A New Approach for High Speed Device , 1969 .

[22]  C.A.T. Salama,et al.  VMOS—A new MOS integrated circuit technology , 1974 .

[23]  J. Nishizawa,et al.  Field-effect transistor versus analog transistor (static induction transistor) , 1975, IEEE Transactions on Electron Devices.

[24]  J. S. Shapiro,et al.  An epitaxial GaAs field-effect transistor , 1969 .

[25]  C. Mead,et al.  Fundamental limitations in microelectronics—I. MOS technology , 1972 .

[26]  J. F. Verwey,et al.  Nonavalanche injection of hot carriers into SiO2 , 1973 .

[27]  F. M. Klaassen,et al.  Design and performance of micron-size devices , 1978 .

[28]  S. R. Hofstein,et al.  The silicon insulated-gate field-effect transistor , 1963 .

[29]  F. N. Trofimenkoff,et al.  Theory and application of the field-effect transistor. Part 1: Theory and d.c. characteristics , 1964 .

[30]  F. Klaassen,et al.  Device down scaling and expected circuit performance , 1979 .

[31]  J.H. Yuan,et al.  Short-channel C-MOS/SOS technology , 1978, IEEE Transactions on Electron Devices.

[32]  Carver A. Mead,et al.  Limitations in microelectronics — II. Bipolar technology☆ , 1972 .

[33]  S. A. Abbas,et al.  Hot‐carrier instability in IGFET’s , 1975 .

[34]  J. Meindl,et al.  VMOS: high speed TTL compatible MOS logic , 1974 .

[35]  R.H. Dennard,et al.  1 µm MOSFET VLSI technology: Part IV—Hot-electron design constraints , 1979, IEEE Transactions on Electron Devices.

[36]  G. D. Alley,et al.  Fabrication and numerical simulation of the permeable base transistor , 1980, IEEE Transactions on Electron Devices.

[37]  J. G. Ruch,et al.  Electron dynamics in short channel field-effect transistors , 1972 .

[38]  W. Hooper,et al.  An epitaxial GaAs field-effect transistor , 1967 .

[39]  T. Nakano,et al.  Electrical characteristics of a DSA MOS transistor with a fine structure , 1979 .