High Stability Gain Structure and Filter Realization with less than 50 ppm/° C Temperature Variation with Ultra-low Power Consumption using Switched-capacitor and Sub-threshold Biasing

This paper presents the design of an ultra-low power subthreshold Gm stage where transconductance is very stable with process, temperature, and voltage variations. This technique is used to design a differential amplifier with constant gain and a second order biquad filter with constant cut off frequency. The amplifier gain achieves a small temperature coefficient of 48.6 ppm/° C and exhibits small sigma of 75 mdB with process. The second order biquad achieves temperature stability of 69 ppm/° C and a voltage coefficient of only 49 ppm/mV.

[1]  Maryam Shojaei Baghini,et al.  A Fully On-Chip PT-Invariant Transconductor , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[2]  A.V. Kordesch,et al.  Performance comparison of MIM capacitors and metal finger capacitors for analog and RF applications , 2004, 2004 RF and Microwave Conference (IEEE Cat. No.04EX924).

[3]  K. Martin,et al.  Generation of accurate on-chip time constants and stable transconductances , 2001, IEEE J. Solid State Circuits.

[4]  Bingxue Shi,et al.  Novel constant transconductance references and the comparisons with the traditional approach , 2003, Southwest Symposium on Mixed-Signal Design, 2003..

[5]  J.M. Steininger.  Understanding wide-band MOS transistors , 1990, IEEE Circuits and Devices Magazine.

[6]  Benton H. Calhoun,et al.  A 1.5 nW, 32.768 kHz XTAL Oscillator Operational From a 0.3 V Supply , 2016, IEEE Journal of Solid-State Circuits.

[7]  D. J. Allstot,et al.  Low-power CMOS continuous-time filters , 1996 .

[8]  Weisong Shi,et al.  Edge Computing: Vision and Challenges , 2016, IEEE Internet of Things Journal.

[9]  João P. Oliveira,et al.  Gm-C biquad filter for low signal sensor applications , 2016, 2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems.

[10]  Shanthi Pavan.  A fixed transconductance bias technique for CMOS analog integrated circuits , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[11]  Yanqing Zhang,et al.  21.3 A 6.45μW self-powered IoT SoC with integrated energy-harvesting power management and ULP asymmetric radios , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[12]  Sean Nicolson,et al.  Improvements in biasing and compensation of CMOS opamps , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[13]  Yu-Jiu Wang,et al.  A PVT-Independent Constant- $G_{m}$ Bias Technique Based on Analog Computation , 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

[14]  Pavan Kumar Hanumolu,et al.  Constant transconductance bias circuit with an on-chip resistor , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[15]  Nagendra Krishnapura,et al.  Accurate Constant Transconductance Generation without Off-Chip Components , 2015, 2015 28th International Conference on VLSI Design.

[16]  Franziska Hoffmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[17]  Un-Ku Moon,et al.  A Sub 1-V Constant $G_{m}$– $C$ Switched-Capacitor Current Source , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[18]  Sameer R. Sonkusale,et al.  A PVT independent subthreshold constant-Gm stage for very low frequency applications , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[19]  Theodore W. Berger,et al.  A 9-nW on-chip constant subthreshold CMOS transconductance bias with fine-tuning , 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).