Semiconductor memory device having on-die-termination device and operation method

A semiconductor memory device having an on-die-termination device and an operation method thereof are provided to assure ODT(On Die Termination) latency stably regardless of PVT(Process, Voltage, Temperature) variation and various operation speeds. A plurality of termination resistors(600) are connected to an output pad in serial and parallel. An operation control unit(500) switches on/off the plurality of termination resistors in response to an operation control signal. A delay path(800) outputs the operation control signal by giving delay corresponding to ODT(On Die Termination) latency to a termination command and then converting the termination command into a DLL clock domain. A delay control signal generation unit(700) controls conversion time into the DLL clock domain.