Power-Rail ESD Clamp Circuit with Polysilicon Diodes Against False Trigger During Fast Power-on Events

A new power-rail ESD clamp circuit with both timing and voltage-level detection is proposed against false trigger events. A RC stage is used for dv/dt detection and a diode string is used to detect the over-stress voltage level during ESD events. By using fully isolated polysilicon diodes, the standby leakage current of the proposed power-rail ESD clamp can be effectively reduced.