FPGA Implementation of a Hammerstein Based Digital Predistorter for Linearizing RF Power Amplifiers with Memory Effects

Power amplifiers (PAs) are inherently nonlinear elements and digital predistortion is a highly cost- effective approach to linearize them. Although most existing architectures assume that the PA has a memoryless nonlinearity, memory effects of the PAs in many applications ,such as wideband code-division multiple access (WCDMA) or orthogonal frequency-division multiplexing (OFDM), can no longer be ignored and memoryless predistortion has limited effectiveness. In this paper, a novel digital predistorter based on the Hammerstein structure has been proposed for linearization of radio frequency power amplifiers with memory effect. Designing the Hammerstein model based digital predistorter has been done using an accurate Wiener model of the power amplifier. The proposed digital predistorter has many advantages such as low computational complexity, low memory space and simple implementation. The elimination of nonlinear effects and constructing accurate behavioral model, which is the exact inverse of a power amplifier characteristic, have been demonstrated by simulating 64 QAM constellation diagram in Matlab. In order to validate the proposed predistorter, it is implemented in Kintex FPGA using Vivado HLS and acceptable results have been obtained.