Design and Optimisation of Integrated CMOS FIR SC Channel Filter for a GSM Receiver

In this paper we present the design of a switched-capacitor (SC) FIR channel filter for a basic band GSM receiver. Among problems that have to be discussed and solved are: enlargement of the frequency range of typical SC FIR filters, optimisation of the filter dynamic range, minimization of the chip area, minimization of the power consumption, reduction of influence of parasitic capacitance on the filter performance, etc. One of the most important tasks was the proper design of the operational amplifiers (OA's) used in the filter, as the OA properties strongly influence the overall filter performance and its power consumption.