Testability measure with reconvergent fanout analysis and its applications

Abstract Many testability measure tools have been developed to reduce computational complexity of automatic test pattern generation (ATPG). These tools, by using linear algorithm or heuristics, obtain quantitative testability measure for each line within a circuit. Such testability measure is usually based on the measures of controllability and observability which do not always reflect the real situation of testability. One reason for this is that reconvergent fanouts can sometimes cause redundant faults. This paper presents a method of computing testability with reconvergent fanout checking and redundant fault detecting, while keeping a reasonable computation complexity. The result obtained is used to guide design transformations in VLSI high-level synthesis so as to generate circuits which are less costly for both ATPG and testing process.