Obstacle-avoiding electromigration aware wire planning for analog circuits

In this paper, we propose an integer linear programming (ILP for short) based algorithm to solve the electromigration aware wire planning which supports the sufficient wire width for each wire according the current values of all sources and targets in analog circuit. The objective is to minimize the total wiring area in the presence of obstacles. First, we perform the reservation space technique for all obstacles to void the interference between the wires and obstacles. Second, we calculate the wire lengths of all source-target pairs with consideration the obstacles. Third, the topology which contains the sufficient widths for all wires is determined by the proposed ILP formulations. Finally, the wire planning results are obtained by transforming each wire of the topology into the horizontal and vertical segments. For the problem of wire planning without obstacles, a legal current assignment will be obtained with minimal wiring area. Experimental results show that the ILP-based approach is significantly improved 13.24% of wiring area on average as compared to the results of the greedy method.

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