A design strategy for low-voltage low-power continuous-time /spl Sigma//spl Delta/ A/D converters
暂无分享,去创建一个
[1] Ángel Rodríguez-Vázquez,et al. Top-Down Design of High-Performance Sigma-Delta Modulators , 1998 .
[2] Bernhard E. Boser,et al. The design of sigma-delta modulation analog-to-digital converters , 1988 .
[3] L. Risbo. Σ-Δ Modulators - Stability Analysis and Optimization , 1995 .
[4] W. Snelgrove,et al. Excess loop delay in continuous-time delta-sigma modulators , 1999 .
[5] Van Der Zwan. A 0.2-mW CMOS ΣΔ modulator for speech coding with 80 dB dynamic range , 1996 .
[6] W. Sansen,et al. A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range , 1998, IEEE J. Solid State Circuits.
[7] Johan H. Huijsing,et al. Design for optimum performance–to–power ratio of a continuous–time ΣΔ modulator , 1999 .
[8] Omid Shoaei,et al. Continuous-Time Delta-Sigma A/D Converters for High Speed Applications , 1995 .
[9] K. W. Cattermole. Theory and Application of the Z-Transform Method , 1965 .