A practical testing framework for isolating hardware timing channels
暂无分享,去创建一个
[1] Frederic T. Chong,et al. Complete information flow tracking from the gates up , 2009, ASPLOS.
[2] Richard A. Kemmerer,et al. Shared resource matrix methodology: an approach to identifying storage and timing channels , 1983, TOCS.
[3] Edward A. Lee,et al. A framework for comparing models of computation , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[4] Frederic T. Chong,et al. Caisson: a hardware description language for secure information flow , 2011, PLDI '11.
[5] Adi Shamir,et al. Cache Attacks and Countermeasures: The Case of AES , 2006, CT-RSA.
[6] Wei-Ming Hu. Reducing Timing Channels with Fuzzy Time , 1992, J. Comput. Secur..
[7] Wei Hu,et al. Information flow isolation in I2C and USB , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).