Asymptotically Zero Power in Reversible Sequential Machines

Conventional methods of energy supply and operation of even CMOS circuits -- a technology providing great savings in static energy loss-- are proving to be stumbling blocks to realizing ultra-dense, petaflop machines, as both energy supply and its dissipation pose very difficult problems. Recently several research results have been reported on practical methods and architectures for adiabatic operation of CMOS circuits in order to both reduce and reclaim electrical energy in circuits. Unfortunately, these methods ignore or fail to recover energies supplied to internal capacitances. Moreover, the penalty of "function reversibility required in these techniques is huge in terms of area. We address both these issues with considerable promise of success. Furthermore, we demonstrate that under mild requirements, storage of values is possible without any lower limit on energy dissipation -- unlike the limit of 1/2 X C X square of Vth, achieved using a latch suggested in literature. Here, we essentially rely on the ability to "unwrite" information stored in the computational pipeline, rather than erase it.