Multi-ring active analogic protection for minority carrier injection suppression in smart power technology
暂无分享,去创建一个
[1] S. Simon Wong,et al. A novel crosstalk isolation structure for bulk CMOS power IC's , 1998 .
[2] Chih-Yao Huang,et al. Design model and guidelines for n-well guard ring in epitaxial CMOS , 1994 .
[3] G. Charitat,et al. Substrate current protection in smart power IC's , 2000, 12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094).
[4] Michele Palmieri,et al. Smart power approaches VLSI complexity , 1998, Proceedings of the 10th International Symposium on Power Semiconductor Devices and ICs. ISPSD'98 (IEEE Cat. No.98CH36212).
[5] Denis Flandre,et al. Substrate crosstalk reduction using SOI technology , 1997 .
[6] Ronald R. Troutman,et al. Latchup in CMOS Technology: The Problem and Its Cure , 1986 .
[7] V. Parthasarathy,et al. Suppression of substrate injection by RESURF LDMOS devices in a smart power technology for 20-30 V applications , 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).